国際会議論文(査読付き)(International Conferences (Refereed))

  1. Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, and Hiroshi Hagiwara “A User-Microprogrammable, Local Host Computer with Low-Level Parallelism”, Proceeding of 10th Annual International Symposium on Computer Architecture, pp.151-157, 1983/06.
  2. Shinji Tomita, Kiyoshi Shibayama, Toshiyuki Nakata, Shinji Yuasa, and Hiroshi Hagiwara “A Computer with Low-Level Parallelism QA-2 — Its Application to 3-D Graphics and Prolog/Lisp Machines”, Proceeding of 13th Annual International Symposium on Computer Architecture, pp.280-289, 1986/06.
  3. Toshiyuki Nakata, Nobuhiko Koike “Functional Simulation Engine of MAN-YO a Special Purpose Parallel Machine for Logic Design Automation”, IEEE Conference Proceeding of 13th Annual International Symposium on Computer Architecture, pp.202-208, 1986/06.
  4. Toshiyuki Nakata, Norio Tanabe, Hiromi Onozuka, Tsuneo Kurobe, and Nobuhiko Koike, “A Multiprocessor System for Modular Circuit Simulation”, Proceedings of ICCAD 87, pp.364-367, 1987/11.
  5. Nobuhiko Koike, Toshiyuki Nakata, Shigeru Takasaki “Integrated CAD Environments for Simulation Engines”, European Simulation Multiconference, pp.691-696, 1990/06.
  6. Nobuhiko Koike, Toshiyuki Nakata, Shigeru Takasaki “Design Considerations for Hardware, Firmware and Software Implementation of Simulation Engines”, European Simulation Multiconference, pp.645-650, 1990/06.
  7. Shigeru Takasaki, Nobuyoshi Nomizu, Yoshihiro Hirabayashi, Hiroshi Ishikura, Masahiro Kurashita, Nobuhiko Koike, Toshiyuki Nakata “III: function level hardware logic simulation system”, ICCD ’90 Proceedings, IEEE International Conference on Computer Design, pp.167-170, 1990/09.
  8. Tsukasa Yamauchi, Toshiyuki Nakata, Akio Ishizuka, Nobuyuki Nishiguchi and Nobuhiko Koike “Proton: A Parallel Detailed Router on an MIMD Parallel Machine”, IEEE/ACM Int. Conf. on Computer Aided Design (ICCAD), pp.340-343, 1991/11.
  9. Toshiyuki Nakata, Norio Tanabe, Nobuki Kajihara, Satoshi Matsushita, Hiromi Onozuka, Yoshihiro Asano, Nobuhiko Koike “Cenju: A Multiprocessor System with a Distributed Shared Memory for Circuit Simulation”, Shared Memory Multiprocessing, MIT Press, pp.363-390, 1992.
  10. H. Onozuka, M. Kanoh, C. Mizuta, T. Nakata and N. Tanabe “Development of Parallelism for Circuit Simulation by Tearing”, 1993 Proc. The European Conference on Design Automation with the European Event in ASIC Design, pp.12-17, 1993/02.
  11. Shun Doi, Kazuhiro Muramatsu, Takumi Washio and Toshiyuki Nakata “Implementing a CFD Solver on Cenju-3 Parallel Computer”, Parallel Computational Fluid Dynamics (Parallel CFD), pp.31-36, 1994/03.
  12. K. Muramatsu, S. Doi, T. Washio, T. Nakata “Cenju-3 parallel Computer and Its Application to CFD”, Int. Symp. on Parallel Architectures, Algorithms & Networks (ISPAN) 94, pp.318-325, 1994/12.
  13. Koutaro Hachiya, Toshiyuki Saito, Toshiyuki Nakata and Norio Tanabe “Enhancement of Parallelism for Tearing-based Circuit Simulation”, ASP-DAC 1997, pp.493-498, 1997/01.
  14. Yasushi Kanoh, Tetsuya Hirose, Masaaki Nakamura, Takeo Hosomi, Kousuke Tatsukawa, Hiroyuki Araki, Tomonori Sugawara, Toshiyuki Nakata “Architecture of a Parallel Computer Cenju-4”, Innovative Architecture for Future Generation High-Performance Processors and Systems 1998, IEEE, pp.105-113, 1998/10.